Discussion:
[PATCH v2 0/9] Qualcomm WCNSS remoteproc
(too old to reply)
Bjorn Andersson
2016-03-29 03:37:22 UTC
Permalink
This series introduces the remoteproc driver for controlling the Qualcomm
Wireless Connectivity Subsystem (WCNSS). The WCNSS is a builtin ARM9 inside the
Qualcomm SoC with an externally connected RF module (iris).

Supports booting and shutting down wcnss on 8064, 8974 and 8016. The driver
will call the crash handler in remoteproc, but further work is needed in the
framework for this not to bring down the kernel.

Changes since v1:
- Split iris definition into separate driver/dt-node
- Move constants from DT to code
- Make stop-state and some of interrupts optional to properly work on 8064
- Cleaned up and made mdt loader support relocation, which is needed on 8016.
- Add dts patches

Bjorn Andersson (9):
dt-binding: remoteproc: Introduce Qualcomm WCNSS loader binding
remoteproc: core: Make the loaded resource table optional
remoteproc: Add additional crash reasons
remoteproc: Introduce Qualcomm WCNSS firmware loader
ARM: dts: qcom: msm8974: Introduce the wcnss remoteproc node
ARM: dts: qcom: apq8064: Add syscon for sic-non-secure
ARM: dts: qcom: apq8064: Add complete smsm node
ARM: dts: qcom: apq8064: Add smd node and all edges
ARM: dts: qcom: apq8064: Introduce wcnss remoteproc

.../bindings/remoteproc/qcom,wcnss-pil.txt | 117 +++++
.../arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts | 4 +
arch/arm/boot/dts/qcom-apq8064.dtsi | 151 ++++++
.../boot/dts/qcom-msm8974-sony-xperia-honami.dts | 32 ++
arch/arm/boot/dts/qcom-msm8974.dtsi | 36 +-
drivers/remoteproc/Kconfig | 12 +
drivers/remoteproc/Makefile | 2 +
drivers/remoteproc/qcom_mdt_loader.c | 172 ++++++
drivers/remoteproc/qcom_mdt_loader.h | 7 +
drivers/remoteproc/qcom_wcnss.c | 579 +++++++++++++++++++++
drivers/remoteproc/qcom_wcnss.h | 22 +
drivers/remoteproc/qcom_wcnss_iris.c | 185 +++++++
drivers/remoteproc/remoteproc_core.c | 10 +-
include/linux/remoteproc.h | 4 +
14 files changed, 1326 insertions(+), 7 deletions(-)
create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt
create mode 100644 drivers/remoteproc/qcom_mdt_loader.c
create mode 100644 drivers/remoteproc/qcom_mdt_loader.h
create mode 100644 drivers/remoteproc/qcom_wcnss.c
create mode 100644 drivers/remoteproc/qcom_wcnss.h
create mode 100644 drivers/remoteproc/qcom_wcnss_iris.c
--
2.5.0
Bjorn Andersson
2016-03-29 03:37:23 UTC
Permalink
From: Bjorn Andersson <***@sonymobile.com>

The document defines the binding for a component that loads firmware for
and boots the Qualcomm WCNSS core.

Signed-off-by: Bjorn Andersson <***@sonymobile.com>
Signed-off-by: Bjorn Andersson <***@linaro.org>
---

Changes since v1:
- Dropped non-variable properties (crash reason, firmware name)
- Split wcnss and iris definitions into separate nodes
- Dropped qcom, prefix of regulator supplies (standard binding)
- Interrupts and stop-state is made optional to support 8064

.../bindings/remoteproc/qcom,wcnss-pil.txt | 117 +++++++++++++++++++++
1 file changed, 117 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt
new file mode 100644
index 000000000000..e317731ec0c8
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt
@@ -0,0 +1,117 @@
+Qualcomm WCNSS Peripheral Image Loader
+
+This document defines the binding for a component that loads and boots firmware
+on the Qualcomm WCNSS core.
+
+- compatible:
+ Usage: required
+ Value type: <string>
+ Definition: must be one of:
+ "qcom,riva-pil",
+ "qcom,pronto-v1-pil",
+ "qcom,pronto-v2-pil"
+
+- reg:
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: base address and size of riva/pronto PMU registers
+
+- interrupts-extended:
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: must list the watchdog and fatal IRQs and may specify the
+ ready, handover and stop-ack IRQs
+
+- interrupt-names:
+ Usage: required
+ Value type: <stringlist>
+ Definition: should be "wdog", "fatal", optionally followed by "ready",
+ "handover", "stop-ack"
+
+- vddmx-supply:
+- vddcx-supply:
+- vddpx-supply:
+ Usage: required
+ Value type: <phandle>
+ Definition: reference to the regulators to be held on behalf of the
+ booting of the WCNSS core
+
+- qcom,state:
+ Usage: optional
+ Value type: <prop-encoded-array>
+ Definition: reference to the SMEM state used to indicate to WCNSS that
+ it should shut down
+
+- qcom,state-names:
+ Usage: optional
+ Value type: <stringlist>
+ Definition: should be "stop"
+
+= SUBNODES
+A single subnode of the WCNSS PIL describes the attached rf module and its
+resource dependencies.
+
+- compatible:
+ Usage: required
+ Value type: <string>
+ Definition: must be one of:
+ "qcom,wcn3620",
+ "qcom,wcn3660",
+ "qcom,wcn3680"
+
+- clocks:
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: should specify the xo clock and optionally the rf clock
+
+- clock-names:
+ Usage: required
+ Value type: <stringlist>
+ Definition: should be "xo", optionally followed by "rf"
+
+- vddxo-supply:
+- vddrfa-supply:
+- vddpa-supply:
+- vdddig-supply:
+ Usage: required
+ Value type: <phandle>
+ Definition: reference to the regulators to be held on behalf of the
+ booting of the WCNSS core
+
+= EXAMPLE
+The following example describes the resources needed to boot control the WCNSS,
+with attached WCN3680, as it is commonly found on MSM8974 boards.
+
+***@fb21b000 {
+ compatible = "qcom,pronto-v2-pil";
+ reg = <0xfb21b000 0x3000>;
+
+ interrupts-extended = <&intc 0 149 1>,
+ <&wcnss_smp2p_slave 0 0>,
+ <&wcnss_smp2p_slave 1 0>,
+ <&wcnss_smp2p_slave 2 0>,
+ <&wcnss_smp2p_slave 3 0>;
+ interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
+
+ vddmx-supply = <&pm8841_s1>;
+ vddcx-supply = <&pm8841_s2>;
+ vddpx-supply = <&pm8941_s3>;
+
+ qcom,state = <&wcnss_smp2p_out 0>;
+ qcom,state-names = "stop";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&wcnss_pin_a>;
+
+ iris {
+ compatible = "qcom,wcn3680";
+
+ clocks = <&rpmcc RPM_CXO_CLK_SRC>, <&rpmcc RPM_CXO_A2>;
+ clock-names = "xo", "rf";
+
+ vddxo-supply = <&pm8941_l6>;
+ vddrfa-supply = <&pm8941_l11>;
+ vddpa-supply = <&pm8941_l19>;
+ vdddig-supply = <&pm8941_s3>;
+ };
+};
--
2.5.0
Rob Herring
2016-03-31 14:31:40 UTC
Permalink
Post by Bjorn Andersson
The document defines the binding for a component that loads firmware for
and boots the Qualcomm WCNSS core.
---
- Dropped non-variable properties (crash reason, firmware name)
- Split wcnss and iris definitions into separate nodes
- Dropped qcom, prefix of regulator supplies (standard binding)
- Interrupts and stop-state is made optional to support 8064
.../bindings/remoteproc/qcom,wcnss-pil.txt | 117 +++++++++++++++++++++
1 file changed, 117 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt
Acked-by: Rob Herring <***@kernel.org>
Bjorn Andersson
2016-04-21 17:21:11 UTC
Permalink
From: Bjorn Andersson <***@sonymobile.com>

The document defines the binding for a component that loads firmware for
and boots the Qualcomm WCNSS core.

Signed-off-by: Bjorn Andersson <***@sonymobile.com>
Signed-off-by: Bjorn Andersson <***@linaro.org>
---

Rob,

I got your Ack on v2, but I would like to make a small amendment before merging
this.


As we discussed related to the WiFi binding I should reference the mmio
registers by a phandle to a DT node specifying the two necessary register
blocks (ccu & dxe).

These two register blocks are part of the riva/pronto (the two major versions)
subsystem, that also contains the "pmu" register block, which is what I access
here.

Further more, the ccu block contains valuable information for debugging
purposes that the implementation of this binding would find useful.


I would therefor like to double this node (in the dts) as both the
riva/pronto-pil and the target for the mmio phandle reference from the WiFi
node.

This works fine, but unless using reg-names for defining the order or the regs
I get a messy ordering dependency between the two bindings. I do not know which
of the other 7-8 register blocks we will add for debugging, but with the below
change I can keep them in block order regardless of the order we implement them
in.

So, can I update the "reg" and add "reg-names" as below to the binding and
depend on reg-names for the ordering of reg? Or should I speculatively add all
ranges I know of to keep the order sane?

Regards,
Bjorn

Changes since v2:
- Modify definition of "reg"
- Add "reg-names"
- Update example

.../bindings/remoteproc/qcom,wcnss-pil.txt | 124 +++++++++++++++++++++
1 file changed, 124 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt
new file mode 100644
index 000000000000..2ddca9be893e
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt
@@ -0,0 +1,124 @@
+Qualcomm WCNSS Peripheral Image Loader
+
+This document defines the binding for a component that loads and boots firmware
+on the Qualcomm WCNSS core.
+
+- compatible:
+ Usage: required
+ Value type: <string>
+ Definition: must be one of:
+ "qcom,riva-pil",
+ "qcom,pronto-v1-pil",
+ "qcom,pronto-v2-pil"
+
+- reg:
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: must contain base address and size of riva/pronto PMU
+ registers
+
+- reg-names:
+ Usage: required
+ Value type: <stringlist>
+ Definition: must contain "pmu"
+
+- interrupts-extended:
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: must list the watchdog and fatal IRQs and may specify the
+ ready, handover and stop-ack IRQs
+
+- interrupt-names:
+ Usage: required
+ Value type: <stringlist>
+ Definition: should be "wdog", "fatal", optionally followed by "ready",
+ "handover", "stop-ack"
+
+- vddmx-supply:
+- vddcx-supply:
+- vddpx-supply:
+ Usage: required
+ Value type: <phandle>
+ Definition: reference to the regulators to be held on behalf of the
+ booting of the WCNSS core
+
+- qcom,state:
+ Usage: optional
+ Value type: <prop-encoded-array>
+ Definition: reference to the SMEM state used to indicate to WCNSS that
+ it should shut down
+
+- qcom,state-names:
+ Usage: optional
+ Value type: <stringlist>
+ Definition: should be "stop"
+
+= SUBNODES
+A single subnode of the WCNSS PIL describes the attached rf module and its
+resource dependencies.
+
+- compatible:
+ Usage: required
+ Value type: <string>
+ Definition: must be one of:
+ "qcom,wcn3620",
+ "qcom,wcn3660",
+ "qcom,wcn3680"
+
+- clocks:
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: should specify the xo clock and optionally the rf clock
+
+- clock-names:
+ Usage: required
+ Value type: <stringlist>
+ Definition: should be "xo", optionally followed by "rf"
+
+- vddxo-supply:
+- vddrfa-supply:
+- vddpa-supply:
+- vdddig-supply:
+ Usage: required
+ Value type: <phandle>
+ Definition: reference to the regulators to be held on behalf of the
+ booting of the WCNSS core
+
+= EXAMPLE
+The following example describes the resources needed to boot control the WCNSS,
+with attached WCN3680, as it is commonly found on MSM8974 boards.
+
+***@fb21b000 {
+ compatible = "qcom,pronto-v2-pil";
+ reg = <0xfb21b000 0x3000>;
+ reg-names = "pmu";
+
+ interrupts-extended = <&intc 0 149 1>,
+ <&wcnss_smp2p_slave 0 0>,
+ <&wcnss_smp2p_slave 1 0>,
+ <&wcnss_smp2p_slave 2 0>,
+ <&wcnss_smp2p_slave 3 0>;
+ interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
+
+ vddmx-supply = <&pm8841_s1>;
+ vddcx-supply = <&pm8841_s2>;
+ vddpx-supply = <&pm8941_s3>;
+
+ qcom,state = <&wcnss_smp2p_out 0>;
+ qcom,state-names = "stop";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&wcnss_pin_a>;
+
+ iris {
+ compatible = "qcom,wcn3680";
+
+ clocks = <&rpmcc RPM_CXO_CLK_SRC>, <&rpmcc RPM_CXO_A2>;
+ clock-names = "xo", "rf";
+
+ vddxo-supply = <&pm8941_l6>;
+ vddrfa-supply = <&pm8941_l11>;
+ vddpa-supply = <&pm8941_l19>;
+ vdddig-supply = <&pm8941_s3>;
+ };
+};
--
2.5.0
Rob Herring
2016-04-22 16:22:57 UTC
Permalink
On Thu, Apr 21, 2016 at 12:20 PM, Bjorn Andersson
Post by Bjorn Andersson
The document defines the binding for a component that loads firmware for
and boots the Qualcomm WCNSS core.
---
Rob,
I got your Ack on v2, but I would like to make a small amendment before merging
this.
As we discussed related to the WiFi binding I should reference the mmio
registers by a phandle to a DT node specifying the two necessary register
blocks (ccu & dxe).
These two register blocks are part of the riva/pronto (the two major versions)
subsystem, that also contains the "pmu" register block, which is what I access
here.
Further more, the ccu block contains valuable information for debugging
purposes that the implementation of this binding would find useful.
I would therefor like to double this node (in the dts) as both the
riva/pronto-pil and the target for the mmio phandle reference from the WiFi
node.
This works fine, but unless using reg-names for defining the order or the regs
I get a messy ordering dependency between the two bindings. I do not know which
of the other 7-8 register blocks we will add for debugging, but with the below
change I can keep them in block order regardless of the order we implement them
in.
You should know based on the compatible string what the number and
order of register ranges are. reg is not something we want evolving
over time.
Post by Bjorn Andersson
So, can I update the "reg" and add "reg-names" as below to the binding and
depend on reg-names for the ordering of reg? Or should I speculatively add all
ranges I know of to keep the order sane?
I'm okay with using this for convenience of the client not having to
care which compatible the block is, but the above should still be met.

Also, you could add a cell which is the index to the register range you need.

Rob
Bjorn Andersson
2016-04-22 16:54:53 UTC
Permalink
Post by Rob Herring
On Thu, Apr 21, 2016 at 12:20 PM, Bjorn Andersson
Post by Bjorn Andersson
The document defines the binding for a component that loads firmware for
and boots the Qualcomm WCNSS core.
---
Rob,
I got your Ack on v2, but I would like to make a small amendment before merging
this.
As we discussed related to the WiFi binding I should reference the mmio
registers by a phandle to a DT node specifying the two necessary register
blocks (ccu & dxe).
These two register blocks are part of the riva/pronto (the two major versions)
subsystem, that also contains the "pmu" register block, which is what I access
here.
Further more, the ccu block contains valuable information for debugging
purposes that the implementation of this binding would find useful.
I would therefor like to double this node (in the dts) as both the
riva/pronto-pil and the target for the mmio phandle reference from the WiFi
node.
This works fine, but unless using reg-names for defining the order or the regs
I get a messy ordering dependency between the two bindings. I do not know which
of the other 7-8 register blocks we will add for debugging, but with the below
change I can keep them in block order regardless of the order we implement them
in.
You should know based on the compatible string what the number and
order of register ranges are. reg is not something we want evolving
over time.
At best I can make an educated guess based on some downstream debug code
on what regs we do have. But I've already found two of the ranges being
incorrect.
Post by Rob Herring
Post by Bjorn Andersson
So, can I update the "reg" and add "reg-names" as below to the binding and
depend on reg-names for the ordering of reg? Or should I speculatively add all
ranges I know of to keep the order sane?
I'm okay with using this for convenience of the client not having to
care which compatible the block is, but the above should still be met.
Okay, I will throw in the 3 I know for now, saying those are required.
And then we add the debug regions as optionals after those, based on
which ones we need. Hopefully I haven't missed any required regions...
Post by Rob Herring
Also, you could add a cell which is the index to the register range you need.
I'm afraid I feel that is just reimplementing reg-names, for the sake of
not using reg-names.


Thanks for your answer, I'll spin the two bindings and send them about
again.

Regards,
Bjorn
Bjorn Andersson
2016-03-29 03:37:38 UTC
Permalink
From: Bjorn Andersson <***@sonymobile.com>

Signed-off-by: Bjorn Andersson <***@sonymobile.com>
Signed-off-by: Bjorn Andersson <***@linaro.org>
---

Changes since v1:
- Added dts patches

.../boot/dts/qcom-msm8974-sony-xperia-honami.dts | 32 +++++++++++++++++++
arch/arm/boot/dts/qcom-msm8974.dtsi | 36 +++++++++++++++++++++-
2 files changed, 67 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
index a0398b69f4f2..74faa291d213 100644
--- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
@@ -311,6 +311,13 @@
pinctrl-0 = <&blsp1_uart2_pin_a>;
};

+ wcnss-***@fb21b000 {
+ status = "ok";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&wcnss_pin_a>;
+ };
+
***@fd510000 {
blsp1_uart2_pin_a: blsp1-uart2-pin-active {
rx {
@@ -366,6 +373,31 @@
};
};

+ wcnss_pin_a: wcnss-pin-active {
+ wlan {
+ pins = "gpio36", "gpio37", "gpio38", "gpio39", "gpio40";
+ function = "wlan";
+
+ drive-strength = <6>;
+ bias-pull-down;
+ };
+
+ bt {
+ pins = "gpio35", "gpio43", "gpio44";
+ function = "bt";
+
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ fm {
+ pins = "gpio41", "gpio42";
+ function = "fm";
+
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
};
};

diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index ef5330578431..5c0d1a46baeb 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -2,6 +2,7 @@

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8974.h>
+#include <dt-bindings/clock/qcom,rpmcc.h>
#include "skeleton.dtsi"

/ {
@@ -24,7 +25,7 @@
no-map;
};

- ***@0d200000 {
+ wcnss_region: ***@0d200000 {
reg = <0x0d200000 0xa00000>;
no-map;
};
@@ -430,6 +431,39 @@
clock-names = "core";
};

+ wcnss-***@fb21b000 {
+ compatible = "qcom,pronto-v2-pil";
+ reg = <0xfb21b000 0x3000>;
+
+ memory-region = <&wcnss_region>;
+
+ interrupts-extended = <&intc 0 149 IRQ_TYPE_EDGE_RISING>,
+ <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&wcnss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
+
+ vddpx-supply = <&pm8941_s3>;
+
+ qcom,state = <&wcnss_smp2p_out 0>;
+ qcom,state-names = "stop";
+
+ status = "disabled";
+
+ iris {
+ compatible = "qcom,wcn3680";
+
+ clocks = <&rpmcc RPM_CXO_A2>;
+ clock-names = "xo";
+
+ vddxo-supply = <&pm8941_l6>;
+ vddrfa-supply = <&pm8941_l11>;
+ vddpa-supply = <&pm8941_l19>;
+ vdddig-supply = <&pm8941_s3>;
+ };
+ };
+
msmgpio: ***@fd510000 {
compatible = "qcom,msm8974-pinctrl";
reg = <0xfd510000 0x4000>;
--
2.5.0
Bjorn Andersson
2016-03-29 03:37:44 UTC
Permalink
Signed-off-by: Bjorn Andersson <***@linaro.org>
---

Andy, this is only here for context, please apply separately.

Changes since v1:
- Added dts patches

arch/arm/boot/dts/qcom-apq8064.dtsi | 49 +++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 9d45c4ef4a97..5a9d68287840 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -124,6 +124,55 @@
hwlocks = <&sfpb_mutex 3>;
};

+ smsm {
+ compatible = "qcom,smsm";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ qcom,ipc-1 = <&l2cc 8 4>;
+ qcom,ipc-2 = <&l2cc 8 14>;
+ qcom,ipc-3 = <&l2cc 8 23>;
+ qcom,ipc-4 = <&sic_non_secure 0x4094 0>;
+
+ apps_smsm: ***@0 {
+ reg = <0>;
+ #qcom,state-cells = <1>;
+ };
+
+ modem_smsm: ***@1 {
+ reg = <1>;
+ interrupts = <0 38 IRQ_TYPE_EDGE_RISING>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ q6_smsm: ***@2 {
+ reg = <2>;
+ interrupts = <0 89 IRQ_TYPE_EDGE_RISING>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ wcnss_smsm: ***@3 {
+ reg = <3>;
+ interrupts = <0 204 IRQ_TYPE_EDGE_RISING>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ dsps_smsm: ***@4 {
+ reg = <4>;
+ interrupts = <0 137 IRQ_TYPE_EDGE_RISING>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
--
2.5.0
Bjorn Andersson
2016-03-29 03:38:04 UTC
Permalink
Signed-off-by: Bjorn Andersson <***@linaro.org>
---

Andy, this is only here for context, please apply separately.

Changes since v1:
- Added dts patches

arch/arm/boot/dts/qcom-apq8064.dtsi | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 65d0e8d98259..9d45c4ef4a97 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -212,6 +212,11 @@
regulator;
};

+ sic_non_secure: sic-non-***@12100000 {
+ compatible = "syscon";
+ reg = <0x12100000 0x10000>;
+ };
+
gsbi1: ***@12440000 {
status = "disabled";
compatible = "qcom,gsbi-v1.0.0";
--
2.5.0
Bjorn Andersson
2016-03-29 03:38:24 UTC
Permalink
Signed-off-by: Bjorn Andersson <***@linaro.org>
---

Changes since v1:
- Added dts patches

.../arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts | 4 ++
arch/arm/boot/dts/qcom-apq8064.dtsi | 57 ++++++++++++++++++++++
2 files changed, 61 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts
index 06b3c76c3e41..276f529383e8 100644
--- a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts
@@ -432,5 +432,9 @@
pinctrl-0 = <&sdcc3_pin_a>, <&sdcc3_cd_pin_a>;
};
};
+
+ ***@3204000 {
+ status = "okay";
+ };
};
};
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index ad7bc3c2aad1..2c213ce80acc 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -20,6 +20,11 @@
reg = <0x80000000 0x200000>;
no-map;
};
+
+ wcnss_mem: ***@8f000000 {
+ reg = <0x8f000000 0x700000>;
+ no-map;
+ };
};

cpus {
@@ -231,6 +236,26 @@

pinctrl-names = "default";
pinctrl-0 = <&ps_hold>;
+
+ wcnss_pin_a: wcnss-pins-active {
+ fm {
+ pins = "gpio14", "gpio15";
+ function = "riva_fm";
+ };
+
+ bt {
+ pins = "gpio16", "gpio17";
+ function = "riva_bt";
+ };
+
+ wlan {
+ pins = "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
+ function = "riva_wlan";
+
+ drive-strength = <6>;
+ bias-pull-down;
+ };
+ };
};

sfpb_wrapper_mutex: ***@1200000 {
@@ -916,6 +941,38 @@
reset-names = "axi", "ahb", "por", "pci", "phy";
status = "disabled";
};
+
+ ***@3204000 {
+ compatible = "qcom,riva-pil";
+ reg = <0x03204000 0x100>;
+
+ interrupts-extended = <&intc 0 199 IRQ_TYPE_EDGE_RISING>,
+ <&wcnss_smsm 6 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal";
+
+ memory-region = <&wcnss_mem>;
+
+ vddcx-supply = <&pm8921_s3>;
+ vddmx-supply = <&pm8921_lvs7>;
+ vddpx-supply = <&pm8921_s4>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&wcnss_pin_a>;
+
+ status = "disabled";
+
+ iris {
+ compatible = "qcom,wcn3660";
+
+ clocks = <&rpmcc 2>;
+ clock-names = "xo";
+
+ vddxo-supply = <&pm8921_l4>;
+ vddrfa-supply = <&pm8921_s2>;
+ vddpa-supply = <&pm8921_l10>;
+ vdddig-supply = <&pm8921_lvs2>;
+ };
+ };
};
};
#include "qcom-apq8064-pins.dtsi"
--
2.5.0
Bjorn Andersson
2016-03-29 03:38:26 UTC
Permalink
Signed-off-by: Bjorn Andersson <***@linaro.org>
---

Andy, this is only here for context, please apply separately.

Changes since v1:
- Added dts patches

arch/arm/boot/dts/qcom-apq8064.dtsi | 40 +++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 5a9d68287840..ad7bc3c2aad1 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -124,6 +124,46 @@
hwlocks = <&sfpb_mutex 3>;
};

+ smd {
+ compatible = "qcom,smd";
+
+ ***@0 {
+ interrupts = <0 37 IRQ_TYPE_EDGE_RISING>;
+
+ qcom,ipc = <&l2cc 8 3>;
+ qcom,smd-edge = <0>;
+
+ status = "disabled";
+ };
+
+ ***@1 {
+ interrupts = <0 90 IRQ_TYPE_EDGE_RISING>;
+
+ qcom,ipc = <&l2cc 8 15>;
+ qcom,smd-edge = <1>;
+
+ status = "disabled";
+ };
+
+ ***@3 {
+ interrupts = <0 138 IRQ_TYPE_EDGE_RISING>;
+
+ qcom,ipc = <&sic_non_secure 0x4080 0>;
+ qcom,smd-edge = <3>;
+
+ status = "disabled";
+ };
+
+ ***@6 {
+ interrupts = <0 198 IRQ_TYPE_EDGE_RISING>;
+
+ qcom,ipc = <&l2cc 8 25>;
+ qcom,smd-edge = <6>;
+
+ status = "disabled";
+ };
+ };
+
smsm {
compatible = "qcom,smsm";
--
2.5.0
Bjorn Andersson
2016-03-29 03:38:59 UTC
Permalink
From: Bjorn Andersson <***@sonymobile.com>

This introduces the peripheral image loader, for loading WCNSS firmware
and boot the core on e.g. MSM8974. The firmware is verified and booted
with the help of the Peripheral Authentication System (PAS) in
TrustZone.

Signed-off-by: Bjorn Andersson <***@sonymobile.com>
Signed-off-by: Bjorn Andersson <***@linaro.org>
---

Changes since v1:
- Split iris definition into separate driver/dt-node
- Move constants from DT to code
- Make stop-state and some of interrupts optional to properly work on 8064
- Cleaned up and made mdt loader support relocation, which is needed on 8016.

drivers/remoteproc/Kconfig | 12 +
drivers/remoteproc/Makefile | 2 +
drivers/remoteproc/qcom_mdt_loader.c | 172 +++++++++++
drivers/remoteproc/qcom_mdt_loader.h | 7 +
drivers/remoteproc/qcom_wcnss.c | 579 +++++++++++++++++++++++++++++++++++
drivers/remoteproc/qcom_wcnss.h | 22 ++
drivers/remoteproc/qcom_wcnss_iris.c | 185 +++++++++++
7 files changed, 979 insertions(+)
create mode 100644 drivers/remoteproc/qcom_mdt_loader.c
create mode 100644 drivers/remoteproc/qcom_mdt_loader.h
create mode 100644 drivers/remoteproc/qcom_wcnss.c
create mode 100644 drivers/remoteproc/qcom_wcnss.h
create mode 100644 drivers/remoteproc/qcom_wcnss_iris.c

diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
index 72e97d7a5209..7290c46fff9d 100644
--- a/drivers/remoteproc/Kconfig
+++ b/drivers/remoteproc/Kconfig
@@ -86,4 +86,16 @@ config ST_REMOTEPROC
processor framework.
This can be either built-in or a loadable module.

+config QCOM_MDT_LOADER
+ tristate
+
+config QCOM_WCNSS_PIL
+ tristate "Qualcomm WCNSS Peripheral Image Loader"
+ depends on OF && ARCH_QCOM
+ select REMOTEPROC
+ select QCOM_MDT_LOADER
+ select QCOM_SCM
+ help
+ Peripherial Image Loader for the WCNSS block.
+
endmenu
diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
index 279cb2edc880..97e6ddbe17ea 100644
--- a/drivers/remoteproc/Makefile
+++ b/drivers/remoteproc/Makefile
@@ -12,3 +12,5 @@ obj-$(CONFIG_STE_MODEM_RPROC) += ste_modem_rproc.o
obj-$(CONFIG_WKUP_M3_RPROC) += wkup_m3_rproc.o
obj-$(CONFIG_DA8XX_REMOTEPROC) += da8xx_remoteproc.o
obj-$(CONFIG_ST_REMOTEPROC) += st_remoteproc.o
+obj-$(CONFIG_QCOM_MDT_LOADER) += qcom_mdt_loader.o
+obj-$(CONFIG_QCOM_WCNSS_PIL) += qcom_wcnss.o qcom_wcnss_iris.o
diff --git a/drivers/remoteproc/qcom_mdt_loader.c b/drivers/remoteproc/qcom_mdt_loader.c
new file mode 100644
index 000000000000..a8195093d640
--- /dev/null
+++ b/drivers/remoteproc/qcom_mdt_loader.c
@@ -0,0 +1,172 @@
+/*
+ * Qualcomm Peripheral Image Loader
+ *
+ * Copyright (C) 2016 Linaro Ltd
+ * Copyright (C) 2015 Sony Mobile Communications Inc
+ * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/elf.h>
+#include <linux/firmware.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/qcom_scm.h>
+#include <linux/remoteproc.h>
+#include <linux/slab.h>
+
+#include "remoteproc_internal.h"
+
+#define QCOM_MDT_TYPE_MASK (7 << 24)
+#define QCOM_MDT_TYPE_HASH (2 << 24)
+#define QCOM_MDT_RELOCATABLE BIT(27)
+
+/**
+ * qcom_mdt_find_rsc_table() - provide dummy resource table for remoteproc
+ * @rproc: remoteproc handle
+ * @fw: firmware header
+ * @tablesz: outgoing size of the table
+ *
+ * Returns a dummy table.
+ */
+struct resource_table *qcom_mdt_find_rsc_table(struct rproc *rproc,
+ const struct firmware *fw,
+ int *tablesz)
+{
+ static struct resource_table table = { .ver = 1, };
+
+ *tablesz = sizeof(table);
+ return &table;
+}
+EXPORT_SYMBOL_GPL(qcom_mdt_find_rsc_table);
+
+/**
+ * qcom_mdt_load() - load the firmware which header is defined in fw
+ * @rproc: rproc handle
+ * @pas_id: PAS identifier to load this firmware into
+ * @fw: frimware object for the header
+ * @mem_phys: physical address of reserved memory region for the firmware
+ * @mem_region: pointer to a mapping of the reserved memory region
+ * @mem_size: size of the reserved memory region
+ *
+ * Returns 0 on success, negative errno otherwise.
+ */
+int qcom_mdt_load(struct rproc *rproc,
+ unsigned int pas_id,
+ const struct firmware *fw,
+ phys_addr_t mem_phys,
+ void *mem_region,
+ size_t mem_size)
+{
+ const struct elf32_phdr *phdrs;
+ const struct elf32_phdr *phdr;
+ const struct elf32_hdr *ehdr;
+ unsigned int fw_name_len;
+ phys_addr_t min_addr = (phys_addr_t)ULLONG_MAX;
+ phys_addr_t max_addr = 0;
+ bool relocate = false;
+ char *fw_name;
+ void *ptr;
+ int ret;
+ int i;
+
+ ehdr = (struct elf32_hdr *)fw->data;
+ phdrs = (struct elf32_phdr *)(ehdr + 1);
+
+ for (i = 0; i < ehdr->e_phnum; i++) {
+ phdr = &phdrs[i];
+
+ if (phdr->p_type != PT_LOAD)
+ continue;
+
+ if ((phdr->p_flags & QCOM_MDT_TYPE_MASK) == QCOM_MDT_TYPE_HASH)
+ continue;
+
+ if (!phdr->p_memsz)
+ continue;
+
+ if (phdr->p_flags & QCOM_MDT_RELOCATABLE)
+ relocate = true;
+
+ if (phdr->p_paddr < min_addr)
+ min_addr = phdr->p_paddr;
+
+ if (phdr->p_paddr + phdr->p_memsz > max_addr)
+ max_addr = round_up(phdr->p_paddr + phdr->p_memsz, SZ_4K);
+ }
+
+ ret = qcom_scm_pas_init_image(pas_id, fw->data, fw->size);
+ if (ret) {
+ dev_err(&rproc->dev, "invalid firmware metadata\n");
+ return -EINVAL;
+ }
+
+ if (relocate) {
+ ret = qcom_scm_pas_mem_setup(pas_id, mem_phys, max_addr - min_addr);
+ if (ret) {
+ dev_err(&rproc->dev, "unable to setup memory for image\n");
+ return -EINVAL;
+ }
+ }
+
+ fw_name_len = strlen(rproc->firmware);
+ if (fw_name_len <= 4)
+ return -EINVAL;
+
+ fw_name = kstrdup(rproc->firmware, GFP_KERNEL);
+ if (!fw_name)
+ return -ENOMEM;
+
+ for (i = 0; i < ehdr->e_phnum; i++) {
+ phdr = &phdrs[i];
+
+ if (phdr->p_type != PT_LOAD)
+ continue;
+
+ if ((phdr->p_flags & QCOM_MDT_TYPE_MASK) == QCOM_MDT_TYPE_HASH)
+ continue;
+
+ if (!phdr->p_memsz)
+ continue;
+
+ if (phdr->p_flags & QCOM_MDT_RELOCATABLE)
+ ptr = mem_region + phdr->p_paddr - min_addr;
+ else
+ ptr = mem_region + phdr->p_paddr - mem_phys;
+
+ if (ptr < mem_region || ptr + phdr->p_memsz > mem_region + mem_size) {
+ dev_err(&rproc->dev, "segment outside memory range\n");
+ ret = -EINVAL;
+ break;
+ }
+
+ if (phdr->p_filesz) {
+ sprintf(fw_name + fw_name_len - 3, "b%02d", i);
+ ret = request_firmware(&fw, fw_name, &rproc->dev);
+ if (ret) {
+ dev_err(&rproc->dev, "failed to load %s\n", fw_name);
+ break;
+ }
+
+ memcpy(ptr, fw->data, fw->size);
+
+ release_firmware(fw);
+ }
+
+ if (phdr->p_memsz > phdr->p_filesz)
+ memset(ptr + phdr->p_filesz, 0, phdr->p_memsz - phdr->p_filesz);
+ }
+
+ kfree(fw_name);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(qcom_mdt_load);
diff --git a/drivers/remoteproc/qcom_mdt_loader.h b/drivers/remoteproc/qcom_mdt_loader.h
new file mode 100644
index 000000000000..a72e3072dea1
--- /dev/null
+++ b/drivers/remoteproc/qcom_mdt_loader.h
@@ -0,0 +1,7 @@
+#ifndef __QCOM_MDT_LOADER_H__
+#define __QCOM_MDT_LOADER_H__
+
+struct resource_table *qcom_mdt_find_rsc_table(struct rproc *rproc, const struct firmware *fw, int *tablesz);
+int qcom_mdt_load(struct rproc *rproc, unsigned int pas_id, const struct firmware *fw, phys_addr_t mem_phys, void *mem_region, size_t mem_size);
+
+#endif
diff --git a/drivers/remoteproc/qcom_wcnss.c b/drivers/remoteproc/qcom_wcnss.c
new file mode 100644
index 000000000000..1d2b82fa820b
--- /dev/null
+++ b/drivers/remoteproc/qcom_wcnss.c
@@ -0,0 +1,579 @@
+/*
+ * Qualcomm Peripheral Image Loader
+ *
+ * Copyright (C) 2016 Linaro Ltd
+ * Copyright (C) 2014 Sony Mobile Communications AB
+ * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/firmware.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/qcom_scm.h>
+#include <linux/regulator/consumer.h>
+#include <linux/remoteproc.h>
+#include <linux/soc/qcom/smem.h>
+#include <linux/soc/qcom/smem_state.h>
+
+#include "qcom_mdt_loader.h"
+#include "remoteproc_internal.h"
+#include "qcom_wcnss.h"
+
+#define WCNSS_CRASH_REASON_SMEM 422
+#define WCNSS_FIRMWARE_NAME "wcnss.mdt"
+#define WCNSS_PAS_ID 6
+
+#define WCNSS_SPARE_NVBIN_DLND BIT(25)
+
+#define WCNSS_PMU_IRIS_XO_CFG BIT(3)
+#define WCNSS_PMU_IRIS_XO_EN BIT(4)
+#define WCNSS_PMU_GC_BUS_MUX_SEL_TOP BIT(5)
+#define WCNSS_PMU_IRIS_XO_CFG_STS BIT(6) /* 1: in progress, 0: done */
+
+#define WCNSS_PMU_IRIS_RESET BIT(7)
+#define WCNSS_PMU_IRIS_RESET_STS BIT(8) /* 1: in progress, 0: done */
+#define WCNSS_PMU_IRIS_XO_READ BIT(9)
+#define WCNSS_PMU_IRIS_XO_READ_STS BIT(10)
+
+#define WCNSS_PMU_XO_MODE_MASK GENMASK(2, 1)
+#define WCNSS_PMU_XO_MODE_19p2 0
+#define WCNSS_PMU_XO_MODE_48 3
+
+static const struct rproc_ops wcnss_ops;
+
+struct wcnss_data {
+ size_t pmu_offset;
+ size_t spare_offset;
+
+ const struct wcnss_vreg_info *vregs;
+ size_t num_vregs;
+};
+
+struct qcom_wcnss {
+ struct device *dev;
+ struct rproc *rproc;
+
+ void __iomem *pmu_cfg;
+ void __iomem *spare_out;
+
+ bool use_48mhz_xo;
+
+ int wdog_irq;
+ int fatal_irq;
+ int ready_irq;
+ int handover_irq;
+ int stop_ack_irq;
+
+ struct qcom_smem_state *state;
+ unsigned int stop_bit;
+
+ struct mutex iris_lock;
+ struct qcom_iris *iris;
+
+ struct regulator_bulk_data *vregs;
+ size_t num_vregs;
+
+ struct completion start_done;
+ struct completion stop_done;
+
+ phys_addr_t mem_phys;
+ void *mem_region;
+ size_t mem_size;
+};
+
+static const struct wcnss_data riva_data = {
+ .pmu_offset = 0x28,
+ .spare_offset = 0xb4,
+
+ .vregs = (struct wcnss_vreg_info[]) {
+ { "vddmx", 1050000, 1150000, 0 },
+ { "vddcx", 1050000, 1150000, 0 },
+ { "vddpx", 1800000, 1800000, 0 },
+ },
+ .num_vregs = 3,
+};
+
+static const struct wcnss_data pronto_v1_data = {
+ .pmu_offset = 0x1004,
+ .spare_offset = 0x1088,
+
+ .vregs = (struct wcnss_vreg_info[]) {
+ { "vddmx", 950000, 1150000, 0 },
+ { "vddcx", .super_turbo = true},
+ { "vddpx", 1800000, 1800000, 0 },
+ },
+ .num_vregs = 3,
+};
+
+static const struct wcnss_data pronto_v2_data = {
+ .pmu_offset = 0x1004,
+ .spare_offset = 0x1088,
+
+ .vregs = (struct wcnss_vreg_info[]) {
+ { "vddmx", 1287500, 1287500, 0 },
+ { "vddcx", .super_turbo = true },
+ { "vddpx", 1800000, 1800000, 0 },
+ },
+ .num_vregs = 3,
+};
+
+void qcom_wcnss_assign_iris(struct qcom_wcnss *wcnss,
+ struct qcom_iris *iris,
+ bool use_48mhz_xo)
+{
+ mutex_lock(&wcnss->iris_lock);
+
+ wcnss->iris = iris;
+ wcnss->use_48mhz_xo = use_48mhz_xo;
+
+ mutex_unlock(&wcnss->iris_lock);
+}
+
+static int wcnss_load(struct rproc *rproc, const struct firmware *fw)
+{
+ struct qcom_wcnss *wcnss = (struct qcom_wcnss *)rproc->priv;
+
+ return qcom_mdt_load(rproc, WCNSS_PAS_ID, fw, wcnss->mem_phys,
+ wcnss->mem_region, wcnss->mem_size);
+}
+
+static const struct rproc_fw_ops wcnss_fw_ops = {
+ .find_rsc_table = qcom_mdt_find_rsc_table,
+ .load = wcnss_load,
+};
+
+static void wcnss_indicate_nv_download(struct qcom_wcnss *wcnss)
+{
+ u32 val;
+
+ /* Indicate NV download capability */
+ val = readl(wcnss->spare_out);
+ val |= WCNSS_SPARE_NVBIN_DLND;
+ writel(val, wcnss->spare_out);
+}
+
+static void wcnss_configure_iris(struct qcom_wcnss *wcnss)
+{
+ u32 val;
+
+ /* Clear PMU cfg register */
+ writel(0, wcnss->pmu_cfg);
+
+ val = WCNSS_PMU_GC_BUS_MUX_SEL_TOP | WCNSS_PMU_IRIS_XO_EN;
+ writel(val, wcnss->pmu_cfg);
+
+ /* Clear XO_MODE */
+ val &= ~WCNSS_PMU_XO_MODE_MASK;
+ if (wcnss->use_48mhz_xo)
+ val |= WCNSS_PMU_XO_MODE_48 << 1;
+ else
+ val |= WCNSS_PMU_XO_MODE_19p2 << 1;
+ writel(val, wcnss->pmu_cfg);
+
+ /* Reset IRIS */
+ val |= WCNSS_PMU_IRIS_RESET;
+ writel(val, wcnss->pmu_cfg);
+
+ /* Wait for PMU.iris_reg_reset_sts */
+ while (readl(wcnss->pmu_cfg) & WCNSS_PMU_IRIS_RESET_STS)
+ cpu_relax();
+
+ /* Clear IRIS reset */
+ val &= ~WCNSS_PMU_IRIS_RESET;
+ writel(val, wcnss->pmu_cfg);
+
+ /* Start IRIS XO configuration */
+ val |= WCNSS_PMU_IRIS_XO_CFG;
+ writel(val, wcnss->pmu_cfg);
+
+ /* Wait for XO configuration to finish */
+ while (readl(wcnss->pmu_cfg) & WCNSS_PMU_IRIS_XO_CFG_STS)
+ cpu_relax();
+
+ /* Stop IRIS XO configuration */
+ val &= ~WCNSS_PMU_GC_BUS_MUX_SEL_TOP;
+ val &= ~WCNSS_PMU_IRIS_XO_CFG;
+ writel(val, wcnss->pmu_cfg);
+
+ /* Add some delay for XO to settle */
+ msleep(20);
+}
+
+static int wcnss_start(struct rproc *rproc)
+{
+ struct qcom_wcnss *wcnss = (struct qcom_wcnss *)rproc->priv;
+ int ret;
+
+ mutex_lock(&wcnss->iris_lock);
+ if (!wcnss->iris) {
+ dev_err(wcnss->dev, "no iris registered\n");
+ ret = -EINVAL;
+ goto release_iris_lock;
+ }
+
+ ret = regulator_bulk_enable(wcnss->num_vregs, wcnss->vregs);
+ if (ret)
+ goto release_iris_lock;
+
+ ret = qcom_iris_enable(wcnss->iris);
+ if (ret)
+ goto disable_regulators;
+
+ wcnss_indicate_nv_download(wcnss);
+ wcnss_configure_iris(wcnss);
+
+ ret = qcom_scm_pas_auth_and_reset(WCNSS_PAS_ID);
+ if (ret) {
+ dev_err(wcnss->dev,
+ "failed to authenticate image and release reset\n");
+ goto disable_iris;
+ }
+
+ ret = wait_for_completion_timeout(&wcnss->start_done,
+ msecs_to_jiffies(5000));
+ if (wcnss->ready_irq > 0 && ret == 0) {
+ /* We have a ready_irq, but it didn't fire in time. */
+ dev_err(wcnss->dev, "start timed out\n");
+ qcom_scm_pas_shutdown(WCNSS_PAS_ID);
+ ret = -ETIMEDOUT;
+ goto disable_iris;
+ }
+
+ ret = 0;
+
+disable_iris:
+ qcom_iris_disable(wcnss->iris);
+disable_regulators:
+ regulator_bulk_disable(wcnss->num_vregs, wcnss->vregs);
+release_iris_lock:
+ mutex_unlock(&wcnss->iris_lock);
+
+ return ret;
+}
+
+static int wcnss_stop(struct rproc *rproc)
+{
+ struct qcom_wcnss *wcnss = (struct qcom_wcnss *)rproc->priv;
+ int ret;
+
+ if (wcnss->state) {
+ qcom_smem_state_update_bits(wcnss->state,
+ BIT(wcnss->stop_bit),
+ BIT(wcnss->stop_bit));
+
+ ret = wait_for_completion_timeout(&wcnss->stop_done,
+ msecs_to_jiffies(5000));
+ if (ret == 0)
+ dev_err(wcnss->dev, "timed out on wait\n");
+
+ qcom_smem_state_update_bits(wcnss->state,
+ BIT(wcnss->stop_bit),
+ 0);
+ }
+
+ ret = qcom_scm_pas_shutdown(WCNSS_PAS_ID);
+ if (ret)
+ dev_err(wcnss->dev, "failed to shutdown: %d\n", ret);
+
+ return ret;
+}
+
+static const struct rproc_ops wcnss_ops = {
+ .start = wcnss_start,
+ .stop = wcnss_stop,
+};
+
+static irqreturn_t wcnss_wdog_interrupt(int irq, void *dev)
+{
+ struct qcom_wcnss *wcnss = dev;
+
+ rproc_report_crash(wcnss->rproc, RPROC_WATCHDOG);
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t wcnss_fatal_interrupt(int irq, void *dev)
+{
+ struct qcom_wcnss *wcnss = dev;
+ size_t len;
+ char *msg;
+
+ msg = qcom_smem_get(QCOM_SMEM_HOST_ANY, WCNSS_CRASH_REASON_SMEM, &len);
+ if (!IS_ERR(msg) && len > 0 && msg[0])
+ dev_err(wcnss->dev, "fatal error received: %s\n", msg);
+
+ rproc_report_crash(wcnss->rproc, RPROC_FATAL_ERROR);
+
+ if (!IS_ERR(msg))
+ msg[0] = '\0';
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t wcnss_ready_interrupt(int irq, void *dev)
+{
+ struct qcom_wcnss *wcnss = dev;
+
+ complete(&wcnss->start_done);
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t wcnss_handover_interrupt(int irq, void *dev)
+{
+ /*
+ * XXX: At this point we're supposed to release the resources that we
+ * have been holding on behalf of the WCNSS. Unfortunately this
+ * interrupt comes way before the other side seems to be done.
+ *
+ * So we're currently relying on the ready interrupt firing later then
+ * this and we just disable the resources at the end of wcnss_start().
+ */
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t wcnss_stop_ack_interrupt(int irq, void *dev)
+{
+ struct qcom_wcnss *wcnss = dev;
+
+ complete(&wcnss->stop_done);
+ return IRQ_HANDLED;
+}
+
+static int wcnss_init_regulators(struct qcom_wcnss *wcnss,
+ const struct wcnss_vreg_info *info,
+ int num_vregs)
+{
+ struct regulator_bulk_data *bulk;
+ int ret;
+ int i;
+
+ bulk = devm_kcalloc(wcnss->dev,
+ num_vregs, sizeof(struct regulator_bulk_data),
+ GFP_KERNEL);
+ if (!bulk)
+ return -ENOMEM;
+
+ for (i = 0; i < num_vregs; i++)
+ bulk[i].supply = info[i].name;
+
+ ret = devm_regulator_bulk_get(wcnss->dev, num_vregs, bulk);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < num_vregs; i++) {
+ if (info[i].max_voltage)
+ regulator_set_voltage(bulk[i].consumer,
+ info[i].min_voltage,
+ info[i].max_voltage);
+
+ if (info[i].load_uA)
+ regulator_set_load(bulk[i].consumer, info[i].load_uA);
+ }
+
+ wcnss->vregs = bulk;
+ wcnss->num_vregs = num_vregs;
+
+ return 0;
+}
+
+static int wcnss_request_irq(struct qcom_wcnss *wcnss,
+ struct platform_device *pdev,
+ const char *name,
+ bool optional,
+ irq_handler_t thread_fn)
+{
+ int ret;
+
+ ret = platform_get_irq_byname(pdev, name);
+ if (ret < 0 && optional) {
+ dev_dbg(&pdev->dev, "no %s IRQ defined, ignoring\n", name);
+ return 0;
+ } else if (ret < 0) {
+ dev_err(&pdev->dev, "no %s IRQ defined\n", name);
+ return ret;
+ }
+
+ ret = devm_request_threaded_irq(&pdev->dev, ret,
+ NULL, thread_fn,
+ IRQF_TRIGGER_RISING | IRQF_ONESHOT,
+ "wcnss", wcnss);
+ if (ret)
+ dev_err(&pdev->dev, "request %s IRQ failed\n", name);
+ return ret;
+}
+
+static int wcnss_alloc_memory_region(struct qcom_wcnss *wcnss)
+{
+ struct device_node *node;
+ struct resource r;
+ int ret;
+
+ node = of_parse_phandle(wcnss->dev->of_node, "memory-region", 0);
+ if (!node) {
+ dev_err(wcnss->dev, "no memory-region specified\n");
+ return -EINVAL;
+ }
+
+ ret = of_address_to_resource(node, 0, &r);
+ if (ret)
+ return ret;
+
+ wcnss->mem_phys = r.start;
+ wcnss->mem_size = resource_size(&r);
+ wcnss->mem_region = devm_ioremap_wc(wcnss->dev, wcnss->mem_phys, wcnss->mem_size);
+ if (!wcnss->mem_region) {
+ dev_err(wcnss->dev, "unable to map memory region: %pa+%zx\n",
+ &r.start, wcnss->mem_size);
+ return -EBUSY;
+ }
+
+ return 0;
+}
+
+static int wcnss_probe(struct platform_device *pdev)
+{
+ const struct wcnss_data *data;
+ struct qcom_wcnss *wcnss;
+ struct resource *res;
+ struct rproc *rproc;
+ void __iomem *mmio;
+ int ret;
+
+ data = of_device_get_match_data(&pdev->dev);
+
+ if (!qcom_scm_is_available())
+ return -EPROBE_DEFER;
+
+ if (!qcom_scm_pas_supported(WCNSS_PAS_ID)) {
+ dev_err(&pdev->dev, "PAS is not available for WCNSS\n");
+ return -ENXIO;
+ }
+
+ rproc = rproc_alloc(&pdev->dev, pdev->name, &wcnss_ops,
+ WCNSS_FIRMWARE_NAME, sizeof(*wcnss));
+ if (!rproc) {
+ dev_err(&pdev->dev, "unable to allocate remoteproc\n");
+ return -ENOMEM;
+ }
+
+ rproc->fw_ops = &wcnss_fw_ops;
+
+ wcnss = (struct qcom_wcnss *)rproc->priv;
+ wcnss->dev = &pdev->dev;
+ wcnss->rproc = rproc;
+ platform_set_drvdata(pdev, wcnss);
+
+ init_completion(&wcnss->start_done);
+ init_completion(&wcnss->stop_done);
+
+ mutex_init(&wcnss->iris_lock);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mmio = devm_ioremap_resource(&pdev->dev, res);
+ if (!mmio) {
+ ret = -ENOMEM;
+ goto free_rproc;
+ };
+
+ ret = wcnss_alloc_memory_region(wcnss);
+ if (ret)
+ goto free_rproc;
+
+ wcnss->pmu_cfg = mmio + data->pmu_offset;
+ wcnss->spare_out = mmio + data->spare_offset;
+
+ ret = wcnss_init_regulators(wcnss, data->vregs, data->num_vregs);
+ if (ret)
+ goto free_rproc;
+
+ ret = wcnss_request_irq(wcnss, pdev, "wdog", false, wcnss_wdog_interrupt);
+ if (ret < 0)
+ goto free_rproc;
+ wcnss->wdog_irq = ret;
+
+ ret = wcnss_request_irq(wcnss, pdev, "fatal", false, wcnss_fatal_interrupt);
+ if (ret < 0)
+ goto free_rproc;
+ wcnss->fatal_irq = ret;
+
+ ret = wcnss_request_irq(wcnss, pdev, "ready", true, wcnss_ready_interrupt);
+ if (ret < 0)
+ goto free_rproc;
+ wcnss->ready_irq = ret;
+
+ ret = wcnss_request_irq(wcnss, pdev, "handover", true, wcnss_handover_interrupt);
+ if (ret < 0)
+ goto free_rproc;
+ wcnss->handover_irq = ret;
+
+ ret = wcnss_request_irq(wcnss, pdev, "stop-ack", true, wcnss_stop_ack_interrupt);
+ if (ret < 0)
+ goto free_rproc;
+ wcnss->stop_ack_irq = ret;
+
+ if (wcnss->stop_ack_irq) {
+ wcnss->state = qcom_smem_state_get(&pdev->dev, "stop",
+ &wcnss->stop_bit);
+ if (IS_ERR(wcnss->state)) {
+ ret = PTR_ERR(wcnss->state);
+ goto free_rproc;
+ }
+ }
+
+ ret = rproc_add(rproc);
+ if (ret)
+ goto free_rproc;
+
+ return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
+
+free_rproc:
+ rproc_put(rproc);
+
+ return ret;
+}
+
+static int wcnss_remove(struct platform_device *pdev)
+{
+ struct qcom_wcnss *wcnss = platform_get_drvdata(pdev);
+
+ of_platform_depopulate(&pdev->dev);
+
+ qcom_smem_state_put(wcnss->state);
+ rproc_put(wcnss->rproc);
+
+ return 0;
+}
+
+static const struct of_device_id wcnss_of_match[] = {
+ { .compatible = "qcom,riva-pil", &riva_data },
+ { .compatible = "qcom,pronto-v1-pil", &pronto_v1_data },
+ { .compatible = "qcom,pronto-v2-pil", &pronto_v2_data },
+ { },
+};
+
+static struct platform_driver wcnss_driver = {
+ .probe = wcnss_probe,
+ .remove = wcnss_remove,
+ .driver = {
+ .name = "qcom-wcnss-pil",
+ .of_match_table = wcnss_of_match,
+ },
+};
+
+module_platform_driver(wcnss_driver);
diff --git a/drivers/remoteproc/qcom_wcnss.h b/drivers/remoteproc/qcom_wcnss.h
new file mode 100644
index 000000000000..9dc4a9fe41e1
--- /dev/null
+++ b/drivers/remoteproc/qcom_wcnss.h
@@ -0,0 +1,22 @@
+#ifndef __QCOM_WNCSS_H__
+#define __QCOM_WNCSS_H__
+
+struct qcom_iris;
+struct qcom_wcnss;
+
+struct wcnss_vreg_info {
+ const char * const name;
+ int min_voltage;
+ int max_voltage;
+
+ int load_uA;
+
+ bool super_turbo;
+};
+
+int qcom_iris_enable(struct qcom_iris *iris);
+void qcom_iris_disable(struct qcom_iris *iris);
+
+void qcom_wcnss_assign_iris(struct qcom_wcnss *wcnss, struct qcom_iris *iris, bool use_48mhz_xo);
+
+#endif
diff --git a/drivers/remoteproc/qcom_wcnss_iris.c b/drivers/remoteproc/qcom_wcnss_iris.c
new file mode 100644
index 000000000000..62a37583c0f8
--- /dev/null
+++ b/drivers/remoteproc/qcom_wcnss_iris.c
@@ -0,0 +1,185 @@
+/*
+ * Qualcomm Peripheral Image Loader
+ *
+ * Copyright (C) 2016 Linaro Ltd
+ * Copyright (C) 2014 Sony Mobile Communications AB
+ * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/qcom_scm.h>
+#include <linux/regulator/consumer.h>
+
+#include "qcom_wcnss.h"
+
+struct qcom_iris {
+ struct device *dev;
+
+ struct clk *xo_clk;
+
+ struct regulator_bulk_data *vregs;
+ size_t num_vregs;
+};
+
+struct iris_data {
+ const struct wcnss_vreg_info *vregs;
+ size_t num_vregs;
+
+ bool use_48mhz_xo;
+};
+
+static const struct iris_data wcn3620_data = {
+ .vregs = (struct wcnss_vreg_info[]) {
+ { "vddxo", 1800000, 1800000, 10000 },
+ { "vddrfa", 1300000, 1300000, 100000 },
+ { "vddpa", 3300000, 3300000, 515000 },
+ { "vdddig", 1800000, 1800000, 10000 },
+ },
+ .num_vregs = 4,
+ .use_48mhz_xo = false,
+};
+
+static const struct iris_data wcn3660_data = {
+ .vregs = (struct wcnss_vreg_info[]) {
+ { "vddxo", 1800000, 1800000, 10000 },
+ { "vddrfa", 1300000, 1300000, 100000 },
+ { "vddpa", 2900000, 3000000, 515000 },
+ { "vdddig", 1200000, 1225000, 10000 },
+ },
+ .num_vregs = 4,
+ .use_48mhz_xo = true,
+};
+
+static const struct iris_data wcn3680_data = {
+ .vregs = (struct wcnss_vreg_info[]) {
+ { "vddxo", 1800000, 1800000, 10000 },
+ { "vddrfa", 1300000, 1300000, 100000 },
+ { "vddpa", 3300000, 3300000, 515000 },
+ { "vdddig", 1800000, 1800000, 10000 },
+ },
+ .num_vregs = 4,
+ .use_48mhz_xo = true,
+};
+
+int qcom_iris_enable(struct qcom_iris *iris)
+{
+ int ret;
+
+ ret = regulator_bulk_enable(iris->num_vregs, iris->vregs);
+ if (ret)
+ return ret;
+
+ ret = clk_prepare_enable(iris->xo_clk);
+ if (ret) {
+ dev_err(iris->dev, "failed to enable xo clk\n");
+ goto disable_regulators;
+ }
+
+ return 0;
+
+disable_regulators:
+ regulator_bulk_disable(iris->num_vregs, iris->vregs);
+
+ return ret;
+}
+
+void qcom_iris_disable(struct qcom_iris *iris)
+{
+ clk_disable_unprepare(iris->xo_clk);
+ regulator_bulk_disable(iris->num_vregs, iris->vregs);
+}
+
+static int qcom_iris_probe(struct platform_device *pdev)
+{
+ const struct iris_data *data;
+ struct qcom_wcnss *wcnss;
+ struct qcom_iris *iris;
+ int ret;
+ int i;
+
+ iris = devm_kzalloc(&pdev->dev, sizeof(struct qcom_iris), GFP_KERNEL);
+ if (!iris)
+ return -ENOMEM;
+
+ data = of_device_get_match_data(&pdev->dev);
+ wcnss = dev_get_drvdata(pdev->dev.parent);
+
+ iris->xo_clk = devm_clk_get(&pdev->dev, "xo");
+ if (IS_ERR(iris->xo_clk)) {
+ if (PTR_ERR(iris->xo_clk) != -EPROBE_DEFER)
+ dev_err(&pdev->dev, "failed to acquire xo clk\n");
+ return PTR_ERR(iris->xo_clk);
+ }
+
+ iris->num_vregs = data->num_vregs;
+ iris->vregs = devm_kcalloc(&pdev->dev,
+ iris->num_vregs,
+ sizeof(struct regulator_bulk_data),
+ GFP_KERNEL);
+ if (!iris->vregs)
+ return -ENOMEM;
+
+ for (i = 0; i < iris->num_vregs; i++)
+ iris->vregs[i].supply = data->vregs[i].name;
+
+ ret = devm_regulator_bulk_get(&pdev->dev, iris->num_vregs, iris->vregs);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to get regulators\n");
+ return ret;
+ }
+
+ for (i = 0; i < iris->num_vregs; i++) {
+ if (data->vregs[i].max_voltage)
+ regulator_set_voltage(iris->vregs[i].consumer,
+ data->vregs[i].min_voltage,
+ data->vregs[i].max_voltage);
+
+ if (data->vregs[i].load_uA)
+ regulator_set_load(iris->vregs[i].consumer,
+ data->vregs[i].load_uA);
+ }
+
+ qcom_wcnss_assign_iris(wcnss, iris, data->use_48mhz_xo);
+
+ return 0;
+}
+
+static int qcom_iris_remove(struct platform_device *pdev)
+{
+ struct qcom_wcnss *wcnss = dev_get_drvdata(pdev->dev.parent);
+
+ qcom_wcnss_assign_iris(wcnss, NULL, false);
+
+ return 0;
+}
+
+static const struct of_device_id iris_of_match[] = {
+ { .compatible = "qcom,wcn3620", .data = &wcn3620_data },
+ { .compatible = "qcom,wcn3660", .data = &wcn3660_data },
+ { .compatible = "qcom,wcn3680", .data = &wcn3680_data },
+ {}
+};
+
+static struct platform_driver wcnss_driver = {
+ .probe = qcom_iris_probe,
+ .remove = qcom_iris_remove,
+ .driver = {
+ .name = "qcom-iris",
+ .of_match_table = iris_of_match,
+ },
+};
+
+module_platform_driver(wcnss_driver);
--
2.5.0
John Stultz
2016-04-15 20:17:58 UTC
Permalink
On Mon, Mar 28, 2016 at 8:37 PM, Bjorn Andersson
Post by Bjorn Andersson
This introduces the peripheral image loader, for loading WCNSS firmware
and boot the core on e.g. MSM8974. The firmware is verified and booted
with the help of the Peripheral Authentication System (PAS) in
TrustZone.
---
- Split iris definition into separate driver/dt-node
- Move constants from DT to code
- Make stop-state and some of interrupts optional to properly work on 8064
- Cleaned up and made mdt loader support relocation, which is needed on 8016.
Hey Bjorn,
As you know, I've been successfully using this patchset along
with a number of other patches in your trees to get wifi working on
the 2013 Nexus7. So for that, this can get a Tested-by: John Stultz
<***@linaro.org> :)

Though while I don't have much feedback on this specific driver, I am
a little curious about how the bigger integrated picture should look.

Currently, after bootup, one must "echo start >
/sys/kernel/debug/remoteproc/remoteproc0/state" to actually boot the
remote processor.

One issue is that if I try to integrate that line into some of the
bootup scripts, the system will hard hang. No panic, no OOPs, no
watchdog reboot, just a full device lockup. So it seems like there
needs to be some checks to ensure that whatever clks or otherhardware
is needed are up and running.

Second, after booting when I do "echo start..." manually, on occasion
I run into the case where while we're waiting for the firmware to
finish loading and the remote proc to come up, wpa_supplicant kicks in
and starts the wcnss driver, which tries to load the configuration
firmware before the remoteproc is all the way up. This fails, and then
usually a few seconds later there's a bad pointer traversal that
Oopses the machine (dmesg log below)

This is clearly racy, and I wonder if the starting of the remoteproc
is something that should be done by the wcnss driver which depends on
it? Though I'm not sure how this would be integrated.

thanks
-john


"echo start..." happened here...

[ 46.719340] remoteproc0: powering up 3204000.wcnss-rproc
[ 46.719486] remoteproc0: Booting fw image wcnss.mdt, size 6804
[ 47.307160] qcom_wcnss_ctrl riva.wcnss: WCNSS Version 1.4 1.2
[ 47.321853] wcn36xx: mac address: 18:00:2d:88:9c:a9

But, before loading is finished, wpa_supplicant starts up...

[ 47.403815] init: Starting service 'wpa_supplicant'...
[ 47.749631] wcn36xx smd:***@6:wcnss:wifi: loading
/system/vendor/firmware/wlan/prima/WCNSS_qcom_wlan_nv.bin failed with
error -13
[ 47.749824] wcn36xx smd:***@6:wcnss:wifi: Direct firmware load for
wlan/prima/WCNSS_qcom_wlan_nv.bin failed with error -2
[ 47.749841] wcn36xx smd:***@6:wcnss:wifi: Falling back to user helper

(Note, this firmware load error above happens normally, and the
userhelper usually has to save the day, this is probably a separate
issue with the wcn36xx patches I'm using, and not an issue with the
remoteproc code)

[ 48.246701] wcn36xx: ERROR Timeout! No SMD response in 500ms
[ 48.246752] wcn36xx: ERROR Failed to push NV to chip
[ 48.268973] init: Service 'wpa_supplicant' (pid 1170) exited with status 255
[ 51.858442] remoteproc0: remote processor 3204000.wcnss-rproc is now up
[ 67.543147] init: Starting service 'wpa_supplicant'...
[ 67.877434] wcn36xx: ERROR hal_load_nv response failed err=5
[ 67.877443] wcn36xx: ERROR Failed to push NV to chip
[ 67.891921] init: Service 'wpa_supplicant' (pid 1175) exited with status 255
[ 87.682962] Unable to handle kernel NULL pointer dereference at
virtual address 00000038
[ 87.683324] pgd = e7d2c000
[ 87.691595] [00000038] *pgd=00000000
[ 87.697486] Internal error: Oops: 5 [#1] PREEMPT SMP ARM
[ 87.697658] CPU: 3 PID: 159 Comm: lmkd Not tainted
4.6.0-rc3-00095-ga08f5eb #1252
[ 87.703041] Hardware name: Qualcomm (Flattened Device Tree)
[ 87.710413] task: e7c69a00 ti: e7d30000 task.ti: e7d30000
[ 87.715798] PC is at kmem_cache_alloc+0x80/0x234
[ 87.721347] LR is at kmem_cache_alloc+0x40/0x234
[ 87.726037] pc : [<c04160c0>] lr : [<c0416080>] psr: 200f0013
[ 87.726037] sp : e7d31f20 ip : 00000001 fp : 7f5c5004
[ 87.730679] r10: 0001025f r9 : e7d30000 r8 : c0e04538
[ 87.741832] r7 : c0425d30 r6 : 024000c0 r5 : c0201b80 r4 : 00000038
[ 87.747047] r3 : 00000000 r2 : 28665000 r1 : 0001025f r0 : 00000000
[ 87.753653] Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none
[ 87.760159] Control: 10c5787d Table: a7d2c06a DAC: 00000051
[ 87.767358] Process lmkd (pid: 159, stack limit = 0xe7d30210)
[ 87.773085] Stack: (0xe7d31f20 to 0xe7d32000)
[ 87.778832] 1f20: e5c92488 00000000 00020001 bea9ea04 00000000
00000000 c0e04594 e7d30000
[ 87.783195] 1f40: 00000000 c0425d30 00020001 00000002 ffffff9c
00000142 c03081c4 e7d30000
[ 87.791355] 1f60: 00000000 c041bb94 00000000 e5c92480 e5c92480
00020001 bea90000 00000002
[ 87.799515] 1f80: 00000100 00000001 00000000 00000000 bea9ea04
000003e8 00000142 c03081c4
[ 87.807675] 1fa0: 00000000 c0308000 00000000 bea9ea04 ffffff9c
bea9ea04 00020001 00000000
[ 87.815834] 1fc0: 00000000 bea9ea04 000003e8 00000142 bea9e984
bea9ea04 7f5c2668 7f5c5004
[ 87.823997] 1fe0: bea9e984 bea9e8e0 b6e7ca45 b6ea1a30 600f0010
ffffff9c 00000000 00000000
[ 87.832171] [<c04160c0>] (kmem_cache_alloc) from [<c0425d30>]
(getname_flags+0x4c/0x1b4)
[ 87.840320] [<c0425d30>] (getname_flags) from [<c041bb94>]
(do_sys_open+0xe4/0x1c0)
[ 87.848471] [<c041bb94>] (do_sys_open) from [<c0308000>]
(ret_fast_syscall+0x0/0x3c)
[ 87.855845] Code: e7924003 e3540000 0a000029 e5953014 (e7940003)
[ 87.863985] ---[ end trace b3cfb7dc9f426996 ]---
[ 87.869888] Kernel panic - not syncing: Fatal exception
[ 87.874477] CPU2: stopping
[ 87.879405] CPU: 2 PID: 1179 Comm: wpa_supplicant Tainted: G D
4.6.0-rc3-00095-ga08f5eb #1252
[ 87.882217] Hardware name: Qualcomm (Flattened Device Tree)
[ 87.891866] [<c030ea58>] (unwind_backtrace) from [<c030b838>]
(show_stack+0x10/0x14)
[ 87.897346] [<c030b838>] (show_stack) from [<c056a56c>]
(dump_stack+0x74/0x94)
[ 87.905311] [<c056a56c>] (dump_stack) from [<c030da78>]
(handle_IPI+0x19c/0x344)
[ 87.912346] [<c030da78>] (handle_IPI) from [<c0301444>]
(gic_handle_irq+0x80/0x8c)
[ 87.919894] [<c0301444>] (gic_handle_irq) from [<c030c650>]
(__irq_usr+0x50/0x80)
[ 87.927257] Exception stack(0xe036ffb0 to 0xe036fff8)
[ 87.934805] ffa0: beb678b0
beb678c8 00000040 98badcfe
[ 87.939879] ffc0: b6eca03c beb678b0 beb678c8 00000000 b6f6aec0
beb678e0 beb678c8 7f6f1890
[ 87.948031] ffe0: b6ed337c beb67760 b6e8b31f b6e807b4 80070030 ffffffff
[ 87.956158] CPU0: stopping
[ 87.962549] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G D
4.6.0-rc3-00095-ga08f5eb #1252
[ 87.965367] Hardware name: Qualcomm (Flattened Device Tree)
[ 87.974301] [<c030ea58>] (unwind_backtrace) from [<c030b838>]
(show_stack+0x10/0x14)
[ 87.979780] [<c030b838>] (show_stack) from [<c056a56c>]
(dump_stack+0x74/0x94)
[ 87.987760] [<c056a56c>] (dump_stack) from [<c030da78>]
(handle_IPI+0x19c/0x344)
[ 87.994791] [<c030da78>] (handle_IPI) from [<c0301444>]
(gic_handle_irq+0x80/0x8c)
[ 88.002339] [<c0301444>] (gic_handle_irq) from [<c030c314>]
(__irq_svc+0x54/0x90)
[ 88.009718] Exception stack(0xc0e01f58 to 0xc0e01fa0)
[ 88.017252] 1f40:
00000001 00000000
[ 88.022326] 1f60: c0e01fb0 c0317cc0 c0e80b80 c0e038dc 00000000
00000000 c0e80b80 c0e03938
[ 88.030486] 1f80: c0d6b610 c0e03930 00000001 c0e01fa8 c0308ad4
c0308ad8 600f0013 ffffffff
[ 88.038637] [<c030c314>] (__irq_svc) from [<c0308ad8>]
(arch_cpu_idle+0x30/0x3c)
[ 88.046791] [<c0308ad8>] (arch_cpu_idle) from [<c035a018>]
(cpu_startup_entry+0x1d0/0x3b4)
[ 88.054267] [<c035a018>] (cpu_startup_entry) from [<c0d00c14>]
(start_kernel+0x334/0x39c)
[ 88.062328] CPU1: stopping
[ 88.070544] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G D
4.6.0-rc3-00095-ga08f5eb #1252
[ 88.073183] Hardware name: Qualcomm (Flattened Device Tree)
[ 88.082128] [<c030ea58>] (unwind_backtrace) from [<c030b838>]
(show_stack+0x10/0x14)
[ 88.087612] [<c030b838>] (show_stack) from [<c056a56c>]
(dump_stack+0x74/0x94)
[ 88.095584] [<c056a56c>] (dump_stack) from [<c030da78>]
(handle_IPI+0x19c/0x344)
[ 88.102618] [<c030da78>] (handle_IPI) from [<c0301444>]
(gic_handle_irq+0x80/0x8c)
[ 88.110168] [<c0301444>] (gic_handle_irq) from [<c030c314>]
(__irq_svc+0x54/0x90)
[ 88.117535] Exception stack(0xc02e5f90 to 0xc02e5fd8)
[ 88.125081] 5f80: 00000001
00000000 c02e5fe8 c0317cc0
[ 88.130155] 5fa0: c0e80b80 c0e038dc 00000000 00000000 c0e80b80
c0e03938 c0d6b610 c0e03930
[ 88.138307] 5fc0: 00000001 c02e5fe0 c0308ad4 c0308ad8 60070013 ffffffff
[ 88.146452] [<c030c314>] (__irq_svc) from [<c0308ad8>]
(arch_cpu_idle+0x30/0x3c)
[ 88.152884] [<c0308ad8>] (arch_cpu_idle) from [<c035a018>]
(cpu_startup_entry+0x1d0/0x3b4)
[ 88.160523] [<c035a018>] (cpu_startup_entry) from [<803014ec>] (0x803014ec)
Bjorn Andersson
2016-04-16 00:27:00 UTC
Permalink
Post by John Stultz
On Mon, Mar 28, 2016 at 8:37 PM, Bjorn Andersson
Post by Bjorn Andersson
This introduces the peripheral image loader, for loading WCNSS firmware
and boot the core on e.g. MSM8974. The firmware is verified and booted
with the help of the Peripheral Authentication System (PAS) in
TrustZone.
---
- Split iris definition into separate driver/dt-node
- Move constants from DT to code
- Make stop-state and some of interrupts optional to properly work on 8064
- Cleaned up and made mdt loader support relocation, which is needed on 8016.
Hey Bjorn,
As you know, I've been successfully using this patchset along
with a number of other patches in your trees to get wifi working on
the 2013 Nexus7. So for that, this can get a Tested-by: John Stultz
Thanks!
Post by John Stultz
Though while I don't have much feedback on this specific driver, I am
a little curious about how the bigger integrated picture should look.
Currently, after bootup, one must "echo start >
/sys/kernel/debug/remoteproc/remoteproc0/state" to actually boot the
remote processor.
One issue is that if I try to integrate that line into some of the
bootup scripts, the system will hard hang. No panic, no OOPs, no
watchdog reboot, just a full device lockup. So it seems like there
needs to be some checks to ensure that whatever clks or otherhardware
is needed are up and running.
I do see a similar problem on 8974, if I enable "clock scaling" on the
RPM. My guess here is that while booting the WCNSS firmware it releases
some clock that we have not voted for, which makes the RPM pull the
carpet underneath us.
Post by John Stultz
Second, after booting when I do "echo start..." manually, on occasion
I run into the case where while we're waiting for the firmware to
finish loading and the remote proc to come up, wpa_supplicant kicks in
and starts the wcnss driver, which tries to load the configuration
firmware before the remoteproc is all the way up. This fails, and then
usually a few seconds later there's a bad pointer traversal that
Oopses the machine (dmesg log below)
There are two cases I've seen this:
1) When the WLAN driver starts communicating with the WLAN part of the
firmware before the WCNSS part has informed us about it being fully
booted (and have accepted the NV).

2) When not being patient enough on the first message sent (after
passing #1).


I redesigned the solution to not probe the wifi (and bt) drivers before
we get the indication from the wcnss firmware, I believe that's what
you're running. So #1 should not be causing this.

I have not seen any additional handling for #2 in the downstream driver,
so perhaps we should just bump the timeout and accept that it's going to
take some time for the firmware to get ready. But further archaeological
efforts are needed to conclude this.
Post by John Stultz
This is clearly racy, and I wonder if the starting of the remoteproc
is something that should be done by the wcnss driver which depends on
it? Though I'm not sure how this would be integrated.
The race should be handled regardless.

But the question of who actually triggers the booting of the wifi
system is still an open one. All executing parts of the wcnss and wifi
driver follows the life cycle of the remote services, i.e. follows the
remoteproc life cycle - so they can't request the system to boot.

We could design it so that the life cycle follows module_init/exit of
the wcnss driver, but that's clunky and as we don't have the firmware
available until later during boot this requires us to have these as
modules (or figure out how to get async firmware loading that waits for
the partition to be mounted).


In the downstream kernel we can see a few different solutions:
- The wireless subsystem comes to life when you touch /dev/wlan, and I
don't think you can shut it down.
- The application DSP has followed a few different models, one being
tied 1:1 with a kernel module for the specific purpose of booting and
stopping the core.
- The video coprocessor, follows the life cycle of the v4l driver - so
that should be fine - except for the firmware not being available at
probe time, so we're back at loading from a future file system.
- The modem is booted when a certain QMI service is being looked for.


In the Android case we could use the HALs and some reference counting to
keep the other CPUs running, but in a normal Linux system we don't have
something like this.

So this is still an open issue, that we have to spend more time on.
Post by John Stultz
thanks
-john
"echo start..." happened here...
[ 46.719340] remoteproc0: powering up 3204000.wcnss-rproc
[ 46.719486] remoteproc0: Booting fw image wcnss.mdt, size 6804
[ 47.307160] qcom_wcnss_ctrl riva.wcnss: WCNSS Version 1.4 1.2
[ 47.321853] wcn36xx: mac address: 18:00:2d:88:9c:a9
Hey, that's my MAC address ;)
Post by John Stultz
But, before loading is finished, wpa_supplicant starts up...
[ 47.403815] init: Starting service 'wpa_supplicant'...
/system/vendor/firmware/wlan/prima/WCNSS_qcom_wlan_nv.bin failed with
error -13
wlan/prima/WCNSS_qcom_wlan_nv.bin failed with error -2
(Note, this firmware load error above happens normally, and the
userhelper usually has to save the day, this is probably a separate
issue with the wcn36xx patches I'm using, and not an issue with the
remoteproc code)
Yeah, I've seen some of that too. As you say it's unrelated, but we
should look into making this not shooting odd error messages at people.
Post by John Stultz
[ 48.246701] wcn36xx: ERROR Timeout! No SMD response in 500ms
[ 48.246752] wcn36xx: ERROR Failed to push NV to chip
[ 48.268973] init: Service 'wpa_supplicant' (pid 1170) exited with status 255
[ 51.858442] remoteproc0: remote processor 3204000.wcnss-rproc is now up
[ 67.543147] init: Starting service 'wpa_supplicant'...
[ 67.877434] wcn36xx: ERROR hal_load_nv response failed err=5
Hmm, 5...

I have not seen that since I figured out how to properly calibrate the
XO before booting the firmware. I'll replicate your setup and will see
if I can trigger this.
Post by John Stultz
[ 67.877443] wcn36xx: ERROR Failed to push NV to chip
[ 67.891921] init: Service 'wpa_supplicant' (pid 1175) exited with status 255
[ 87.682962] Unable to handle kernel NULL pointer dereference at
virtual address 00000038
[ 87.683324] pgd = e7d2c000
[ 87.691595] [00000038] *pgd=00000000
[ 87.697486] Internal error: Oops: 5 [#1] PREEMPT SMP ARM
[ 87.697658] CPU: 3 PID: 159 Comm: lmkd Not tainted
4.6.0-rc3-00095-ga08f5eb #1252
[ 87.703041] Hardware name: Qualcomm (Flattened Device Tree)
[ 87.710413] task: e7c69a00 ti: e7d30000 task.ti: e7d30000
[ 87.715798] PC is at kmem_cache_alloc+0x80/0x234
[ 87.721347] LR is at kmem_cache_alloc+0x40/0x234
This seems "unrelated", I wonder if either we or the remote is trashing
some memory when we're triggering this case.

Regards,
Bjorn
Stanimir Varbanov
2016-05-25 11:13:52 UTC
Permalink
Post by Bjorn Andersson
This introduces the peripheral image loader, for loading WCNSS firmware
and boot the core on e.g. MSM8974. The firmware is verified and booted
with the help of the Peripheral Authentication System (PAS) in
TrustZone.
---
- Split iris definition into separate driver/dt-node
- Move constants from DT to code
- Make stop-state and some of interrupts optional to properly work on 8064
- Cleaned up and made mdt loader support relocation, which is needed on 8016.
drivers/remoteproc/Kconfig | 12 +
drivers/remoteproc/Makefile | 2 +
drivers/remoteproc/qcom_mdt_loader.c | 172 +++++++++++
drivers/remoteproc/qcom_mdt_loader.h | 7 +
drivers/remoteproc/qcom_wcnss.c | 579 +++++++++++++++++++++++++++++++++++
drivers/remoteproc/qcom_wcnss.h | 22 ++
drivers/remoteproc/qcom_wcnss_iris.c | 185 +++++++++++
7 files changed, 979 insertions(+)
create mode 100644 drivers/remoteproc/qcom_mdt_loader.c
create mode 100644 drivers/remoteproc/qcom_mdt_loader.h
create mode 100644 drivers/remoteproc/qcom_wcnss.c
create mode 100644 drivers/remoteproc/qcom_wcnss.h
create mode 100644 drivers/remoteproc/qcom_wcnss_iris.c
<cut>
Post by Bjorn Andersson
+
+static int wcnss_remove(struct platform_device *pdev)
+{
+ struct qcom_wcnss *wcnss = platform_get_drvdata(pdev);
+
+ of_platform_depopulate(&pdev->dev);
+
+ qcom_smem_state_put(wcnss->state);
+ rproc_put(wcnss->rproc);
might be need to call rproc_del() too ?
Post by Bjorn Andersson
+
+ return 0;
+}
+
<cut>
--
regards,
Stan
Bjorn Andersson
2016-05-25 19:01:11 UTC
Permalink
Post by Stanimir Varbanov
Post by Bjorn Andersson
This introduces the peripheral image loader, for loading WCNSS firmware
and boot the core on e.g. MSM8974. The firmware is verified and booted
with the help of the Peripheral Authentication System (PAS) in
TrustZone.
---
- Split iris definition into separate driver/dt-node
- Move constants from DT to code
- Make stop-state and some of interrupts optional to properly work on 8064
- Cleaned up and made mdt loader support relocation, which is needed on 8016.
drivers/remoteproc/Kconfig | 12 +
drivers/remoteproc/Makefile | 2 +
drivers/remoteproc/qcom_mdt_loader.c | 172 +++++++++++
drivers/remoteproc/qcom_mdt_loader.h | 7 +
drivers/remoteproc/qcom_wcnss.c | 579 +++++++++++++++++++++++++++++++++++
drivers/remoteproc/qcom_wcnss.h | 22 ++
drivers/remoteproc/qcom_wcnss_iris.c | 185 +++++++++++
7 files changed, 979 insertions(+)
create mode 100644 drivers/remoteproc/qcom_mdt_loader.c
create mode 100644 drivers/remoteproc/qcom_mdt_loader.h
create mode 100644 drivers/remoteproc/qcom_wcnss.c
create mode 100644 drivers/remoteproc/qcom_wcnss.h
create mode 100644 drivers/remoteproc/qcom_wcnss_iris.c
<cut>
Post by Bjorn Andersson
+
+static int wcnss_remove(struct platform_device *pdev)
+{
+ struct qcom_wcnss *wcnss = platform_get_drvdata(pdev);
+
+ of_platform_depopulate(&pdev->dev);
+
+ qcom_smem_state_put(wcnss->state);
+ rproc_put(wcnss->rproc);
might be need to call rproc_del() too ?
You're correct. Thanks for having a look!

Regards,
Bjorn
Bjorn Andersson
2016-03-29 03:39:03 UTC
Permalink
From: Bjorn Andersson <***@sonymobile.com>

The Qualcomm WCNSS can crash by watchdog or a fatal software error. Add
these types to the list of remoteproc crash reasons.

Signed-off-by: Bjorn Andersson <***@sonymobile.com>
Signed-off-by: Bjorn Andersson <***@linaro.org>
---

Changes since v1:
- None

drivers/remoteproc/remoteproc_core.c | 2 ++
include/linux/remoteproc.h | 4 ++++
2 files changed, 6 insertions(+)

diff --git a/drivers/remoteproc/remoteproc_core.c b/drivers/remoteproc/remoteproc_core.c
index c04a786dc051..19a906716abd 100644
--- a/drivers/remoteproc/remoteproc_core.c
+++ b/drivers/remoteproc/remoteproc_core.c
@@ -57,6 +57,8 @@ static DEFINE_IDA(rproc_dev_index);

static const char * const rproc_crash_names[] = {
[RPROC_MMUFAULT] = "mmufault",
+ [RPROC_WATCHDOG] = "watchdog",
+ [RPROC_FATAL_ERROR] = "fatal error",
};

/* translate rproc_crash_type to string */
diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h
index 9c4e1384f636..1c457a8dd5a6 100644
--- a/include/linux/remoteproc.h
+++ b/include/linux/remoteproc.h
@@ -365,6 +365,8 @@ enum rproc_state {
/**
* enum rproc_crash_type - remote processor crash types
* @RPROC_MMUFAULT: iommu fault
+ * @RPROC_WATCHDOG: watchdog bite
+ * @RPROC_FATAL_ERROR fatal error
*
* Each element of the enum is used as an array index. So that, the value of
* the elements should be always something sane.
@@ -373,6 +375,8 @@ enum rproc_state {
*/
enum rproc_crash_type {
RPROC_MMUFAULT,
+ RPROC_WATCHDOG,
+ RPROC_FATAL_ERROR,
};

/**
--
2.5.0
Bjorn Andersson
2016-03-29 03:39:37 UTC
Permalink
From: Bjorn Andersson <***@sonymobile.com>

Remote processors like the ones found in the Qualcomm SoCs does not have
a resource table passed to them, so make it optional by only populating
it if it does exist.

Signed-off-by: Bjorn Andersson <***@sonymobile.com>
Signed-off-by: Bjorn Andersson <***@linaro.org>
---

Changes since v1:
- None

drivers/remoteproc/remoteproc_core.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/remoteproc/remoteproc_core.c b/drivers/remoteproc/remoteproc_core.c
index 3d7d58a109d8..c04a786dc051 100644
--- a/drivers/remoteproc/remoteproc_core.c
+++ b/drivers/remoteproc/remoteproc_core.c
@@ -856,12 +856,8 @@ static int rproc_fw_boot(struct rproc *rproc, const struct firmware *fw)
* copy this information to device memory.
*/
loaded_table = rproc_find_loaded_rsc_table(rproc, fw);
- if (!loaded_table) {
- ret = -EINVAL;
- goto clean_up;
- }
-
- memcpy(loaded_table, rproc->cached_table, tablesz);
+ if (loaded_table)
+ memcpy(loaded_table, rproc->cached_table, tablesz);

/* power up the remote processor */
ret = rproc->ops->start(rproc);
--
2.5.0
f***@gmail.com
2016-11-10 09:31:47 UTC
Permalink
Is this removable? It "someone" has ruined every laptop in my house, deleting years of pictures covering his tracks, my phone only allows certain things not to mention the complete invasion of privacy.
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